Dr. Shady Agwa
Research Fellow

- Centre for Electronics Frontiers
- Institute for Integrated Micro and Nano Systems
- School of Engineering
Contact details
- Email: shady.agwa@ed.ac.uk
Address
- Street
-
1.24D Murchison House, King's Buildings Campus
- City
- Edinburgh
- Post code
- EH9 3BF
Background
Shady Agwa (Member, IEEE) is a Research Fellow at the Centre for Electronics Frontiers (CEF), The University of Edinburgh (UK). He received his BSc and MSc degree from Assiut University (Egypt), both in Electrical Engineering. He got his PhD in Electronics Engineering from The American University in Cairo (Egypt) in 2018. Following his PhD, he joined the Computer Systems Laboratory at Cornell University (USA) as a Postdoctoral Associate for two years. In 2021, Shady joined the Centre for Electronics Frontiers at the University of Southampton (UK) as a Senior Research Fellow and then as a Research Fellow at the University of Edinburgh (UK). His research interests span across VLSI and Computer Architecture for AI using conventional and emerging technologies. His work focuses on ASIC-Driven AI Architectures with extensive expertise in In-Memory Computing, Stochastic Computing, Systolic Arrays, Beyond Von Neumann Architectures, Memories and Energy-Efficient Digital ASIC Design.
CV

Qualifications
PhD in Electronics Engineering.
MSc. in Computer Engineering.
BSc. in Computer Engineering.
Undergraduate teaching
Digital System Design Course (3rd), The University of Edinburgh, UK.
Digital Systems Lab Course (4th), The University of Edinburgh, UK.
Postgraduate teaching
Digital Systems Lab Course (MSc), The University of Edinburgh, UK.
Open to PhD supervision enquiries?
Yes
Current PhD students supervised
Bochen Ye, Large-Scale Digital AI systems for Large Language Models (LLMs).
Past PhD students supervised
Ahmed Abdelmaksoud, AI Hardware Acceleration for Large Language Models LLMs using Systolic Arrays and Digital ASIC.
Research summary
Research interests span across VLSI and Computer Architecture for AI using conventional and emerging technologies, focusing on ASIC-Driven AI Architectures and AI Specific Integrated Circuit AISIC design with extensive expertise in In-Memory Computing, Stochastic Computing, Systolic Arrays, Beyond Von Neumann Architectures, Memories and Energy-Efficient Digital ASIC Design.
Current research interests
AI Hardware, Unconventional Computing, Digital VLSI, Computer Architecture, Memory Design, FPGA Design In-Memory Computing Architectures, Stochastic Computing, Systolic Arrays, CNNs, LLMs, TransformersProject activity
- Spatial Dataflow Architectures for AI (CNNs & Transformers), 2023 - Present: The University of Edinburgh, UK.
- Digital In-memory Stochastic Computing Architectures, 2022 - Present: The University of Edinburgh, UK.
- Prosensing, ACAM Pixels for Edge Classification, 2022 - Present: The University of Edinburgh, UK.
- Memristors Characterization Platform, 2021 - 2022: The University of Edinburgh & Imperial College London, UK.
- Symbolic-Level Computing using Associative Memories, 2021 - 2022: The University of Edinburgh, UK.
- Digital In-memory Computing Architecture using Emerging SOTFET Device, 2020 – 2021: Cornell University, USA.
- Multi-Core Implementation for CIFER Chip, 2020 – 2021: Cornell University & Princeton University, USA.
- Digital In-SRAM Computing, 2019 – 2021: Cornell University, USA.
- Hammer-Blade Manycore Evaluation, 2019 – 2020: Cornell University & University of Washington, USA.
Current project grants
“ProSensing: Low-Power, High-Speed, Adaptable Processing-In-Sensing Capability”, 2024
UKRI EPSRC National Security Sandpit 2, Budget: £1,457,851.00, 3 Years.
Themis Prodromakis (PI) and Shady Agwa (Research Co-I), University of Edinburgh.
Eiman Kanjo (Co-I), Nottingham Trent University.
Antonio Hurtado (Co-I), University of Strathclyde.
Invited speaker
“Bridging The Gap Between Emerging Technologies And AI Hardware,” 8th European Congress on Advanced Nanotechnology and Nanomaterials, London, UK, Oct. 2023.
“Digital In-Memory Stochastic Computing Architectures,” CAS sponsored Seasonal School on " Neuromorphic Computing and Logic In Memory Computing Using Non-Volatile Memory Devices", Sept 2024.
Organiser
“ASIC-BASIC”, Summer Workshop for MSc./PhD Students at University of Edinburgh on Basics of Digital ASIC Design using open-source Skywater 130nm PDK.
Participant
“AISCA: AI-Specific Computing Architectures for Bridging The AI Performance Gap,” Poster at “International Workshop on Reliable and Sustainable Neuromorphic Hardware”, York, UK, May 2025.